1. Field of Invention
This invention relates generally to semiconductor memories and specifically to a page buffer having automatic program verify and reset features.
2. Description of Related Art
Non-volatile memories such as, for instance, EEPROM and Flash EEPROM, include a plurality of memory cells contained within an array. Typically, the memory cells are floating gate MOS transistors having a source, a drain, a floating gate, and a control gate. Since such floating gate memory cells are programmed by inducing the accumulation of electrons on the floating gate and erased by discharging electrons from the floating gate, the threshold voltage (V.sub.T) of a programmed cell is more positive than that of an erased cell. It is the difference between the program V.sub.T and the erase V.sub.T of a cell which determines the "binary state" of the cell. For instance, a programmed cell represents the binary value "1", and an erased cell represents the binary value binary "0". To read the binary state of a cell, a read voltage which lies between the program V.sub.T and the erase V.sub.T is applied to the control gate of the cell. Thus, if the cell is an NMOS device, the cell conducts a channel current if in an erased state and, conversely, if the cell is a PMOS device, the cell conducts a channel current if in a programmed state.
Typically, when writing data to a selected row of cells in the array, a first byte of input data is latched into page buffers of the memory and thereafter written to the first eight cells in the selected row (assuming, of course, that a byte is eight bits). The binary states of the cells are determined in a well known manner and compared with the first byte of input data. If there is a match, a second byte of input data is latched into the page buffers and thereafter written to the next eight cells of the selected row. If, on the other hand, the binary states of the first eight cells do not match the first byte of input data, thereby indicating that one or more of the first eight cells are not properly programmed, the cells are re-programmed. The binary states of these first eight cells are again compared to the first byte of data, and so on, until there is a match. This mechanism, commonly known as a program verify operation, ensures that the first eight cells in the selected row are properly programmed, that is, that they accurately represent the first byte of input data. The next byte of input data is then latched into the page buffers and thereafter written to the next eight cells in the selected row.
As mentioned above, the program V.sub.T of a floating gate memory cell is more positive than its erase V.sub.T. Further, the threshold voltage of the cell, when properly programmed, should fall within a predetermined program V.sub.T range. Accordingly, when a program operation fails to sufficiently increase a cell's threshold voltage (in the positive direction) so as to fall within the program V.sub.T range, the cell remains in an erased state and, therefore, must be re-programmed to further increase its threshold voltage. However, a problem arises when only a portion of the cells corresponding to a particular data byte are not properly programmed. As noted above, when an inconsistency between a byte of input data and the respective binary states of the eight cells corresponding thereto is detected in a program verify operation, the entire byte of cells is re-programmed. Thus, while the respective threshold voltages of cells which were not properly programmed may now fall within the program V.sub.T range, the respective threshold voltages of cells which were properly programmed may now exceed the positive-most limit of the program V.sub.T range. As a result, a subsequent erase operation may not sufficiently discharge the floating gates of these "over-programmed" cells so as to return their threshold voltages to a level indicative of erased cells. In other words, these overprogrammed cells remain in a programmed state even after being erased, thereby resulting in the storage of erroneous data. Furthermore, over-charging the floating gate of a cell may degrade cell endurance.